NTK has developed an organic buildup substrate technology for high-speed flip chip devices, called NTS™. NTS is optimized for high density MPU and ASIC applications, where lower conductor resistance and low dielectric constant are required. Multiple buildup layers are possible around the BT core material.  BGA or PGA styles are available.

Features:

Flip chip solution for high density, high performance ASIC and MPU devices

Multiple build up layers for signal and plane distribution are possible around the central core material.

Low resistance copper conductors

Highly reliable photo/laser dielectric film is used for the build up insulator

Flip Chip Bumps

Diameter: 100 ~ 120µm

Pitch: 200 ~ 230µm

Traces

Width: 30 ~ 35µm

Space: 30 ~ 35µm

Vias

Diameter: 80 ~ 90µm

Pad diameter: 120 ~ 130µm

Plated Through Holes (PTH) - Core

Diameter: 250 ~ 300µm

Pitch: 600 ~ 650µm

Package Options

OLGA or OPGA options for L2 interconnections

Available chip site surface finishes:

Ni/Au plating plus eutectic solder

For other types, please contact NTK